Title :
Neutron- and Proton-Induced Single Event Upsets for D- and DICE-Flip/Flop Designs at a 40 nm Technology Node
Author :
Loveless, T.D. ; Jagannathan, S. ; Reece, T. ; Chetia, J. ; Bhuva, B.L. ; McCurdy, M.W. ; Massengill, L.W. ; Wen, S.-J. ; Wong, R. ; Rennie, D.
Author_Institution :
Inst. for Space & Defense Electron., Vanderbilt Univ., Nashville, TN, USA
fDate :
6/1/2011 12:00:00 AM
Abstract :
Neutron- and proton-induced single-event upset cross sections of D- and DICE-Flip/Flops are analyzed for designs implemented in a 40 nm bulk technology node. Neutron and proton testing of the flip/flops show only a 30%-50% difference between D- and DICE-Flip/Flop error rates and cross sections. Simulations are used to show that charge sharing is the primary cause for the similar failures-in-time (FIT) rates. Such small improvement in the single-event performance of the DICE implementation over standard D-Flip/Flop designs may warrant careful consideration for the use of DICE designs in 40 nm bulk technologies and beyond.
Keywords :
flip-flops; integrated circuit design; integrated circuit testing; D-flip-flop designs; DICE-flip-flop designs; bulk technology node; failures-in-time rates; neutron testing; neutron-induced single event upsets; neutron-induced single-event upset cross sections; proton testing; proton-induced single event upsets; proton-induced single-event upset cross sections; size 40 nm; Neutrons; Particle beams; Protons; Shift registers; Simulation; Solid modeling; Transistors; Neutron radiation effects; proton radiation effects; single event upsets; soft errors;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2011.2123918