DocumentCode :
1489007
Title :
A 1-Gb/s bidirectional I/O buffer using the current-mode scheme
Author :
Sim, Jae-Yoon ; Sohn, Young-Soo ; Heo, Seung-Chan ; Park, Hong-June ; Cho, Soo-In
Author_Institution :
Dept. of Electr. Eng., Pohang Univ. of Sci. & Technol., South Korea
Volume :
34
Issue :
4
fYear :
1999
fDate :
4/1/1999 12:00:00 AM
Firstpage :
529
Lastpage :
535
Abstract :
A current-mode bidirectional I/O buffer was designed, and the maximum effective bandwidth of 1.0 Gb/s per wire was obtained from measurements. To enhance the operating speed, the voltage swing on the transmission line was reduced to 0.5 V and the internal nodes of the buffer were designed to be low impedance nodes using the current-mode scheme. An automatic impedance-matching scheme was used to generate bias voltages, which adjust output resistance of the buffer to be equal to the characteristic impedance of the transmission line in spite of process variations. The chip was fabricated by using a 0.8-μm CMOS technology. The chip size was 500×330 μm2, and the power consumption was 50 mW at a supply voltage of 3 V
Keywords :
CMOS digital integrated circuits; buffer circuits; current-mode circuits; data communication equipment; transceivers; 0.8 micron; 3 V; 50 mW; CMOS technology; bias voltages; bidirectional I/O buffer; characteristic impedance; current-mode scheme; internal nodes; low impedance nodes; maximum effective bandwidth; operating speed; output resistance; power consumption; process variations; voltage swing; Bandwidth; CMOS technology; Character generation; Current measurement; Electrical resistance measurement; Impedance; Power transmission lines; Transmission line measurements; Voltage; Wire;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.753686
Filename :
753686
Link To Document :
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