DocumentCode
1489651
Title
Direct Digital Frequency Synthesizer Using Nonuniform Piecewise-Linear Approximation
Author
De Caro, Davide ; Petra, Nicola ; Strollo, Antonio Giuseppe Maria
Author_Institution
Dept. of Electron. & Telecommun. Eng., Univ. of Naples Federico II, Naples, Italy
Volume
58
Issue
10
fYear
2011
Firstpage
2409
Lastpage
2419
Abstract
This paper investigates a novel direct digital frequency synthesizer architecture, based on piecewise linear approximation with segments of nonuniform length. The new approach allows reducing the total number of segments with respect to the well-known uniform segmentation. In this way the size of the coefficient ROM is also reduced with beneficial effects in terms of speed and power. We show that the optimal nonuniform segmentation (that maximizes the spurious-free dynamic range for a given number of nonuniform segments) can be obtained as the solution of a mixed-integer linear programming problem. Three simple, suboptimal, nonuniform segmentation schemes (which lend themselves to efficient hardware implementation) are proposed in this paper. We present also several design examples and VLSI implementation results, which demonstrate the effectiveness of the developed technique.
Keywords
VLSI; approximation theory; direct digital synthesis; integer programming; linear programming; piecewise linear techniques; VLSI; coefficient ROM; direct digital frequency synthesizer architecture; mixed-integer linear programming problem; nonuniform piecewise-linear approximation; optimal nonuniform segmentation schemes; Approximation methods; Hardware; Harmonic analysis; Piecewise linear approximation; Polynomials; Read only memory; DDFS; direct-digital frequency synthesizer; nonuniform segmentation; piecewise linear approximation; polynomial interpolation;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2011.2123730
Filename
5743038
Link To Document