Title :
A flexible heterogeneous video processor system for television applications
Author :
Jaspers, Egbert G T ; De With, Peter H N ; Janssen, Johan G W M
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
fDate :
2/1/1999 12:00:00 AM
Abstract :
A new video processing architecture for high-end TV applications is presented, featuring a flexible heterogeneous multi-processor architecture, executing video tasks in parallel and independently. The signal flow graph and the processors are programmable, enabling an optimal picture quality for different TV display modes. The concept is verified by an experimental chip design. The architecture allows several video streams to be processed and displayed in parallel and in a programmable way, with an individual signal quality
Keywords :
digital signal processing chips; multiprocessing systems; parallel architectures; television applications; video signal processing; 16 MHz; 64 MHz; TV display modes; experimental chip design; flexible heterogeneous video processor system; multiprocessor architecture; optimal picture quality; parallel processing; programmable processors; signal flow graph; signal quality; video processing architecture; video streams; Chip scale packaging; Decoding; Digital TV; Displays; Filters; Flow graphs; Hardware; Internet; Signal processing; Streaming media;
Journal_Title :
Consumer Electronics, IEEE Transactions on
