Title :
Measurement, modeling, and simulation of flip-chip CMOS ASIC simultaneous switching noise on a multilayer ceramic BGA
Author :
Libous, James P. ; O´Connor, Daniel P.
Author_Institution :
CMOS ASIC Technol. Dev., IBM Microelectron., Endicott, NY, USA
fDate :
8/1/1997 12:00:00 AM
Abstract :
This paper presents the simultaneous switching noise (SSN) measurements, modeling, and simulation of a flip-chip complementary metal-oxide-semiconductor (CMOS) application-specific integrated circuit (ASIC) test chip on a multilayer ceramic ball grid array (CBGA) package. Technology and design features of the chip and package test vehicles are described. Time-domain noise measurement techniques and results are presented in detail. Circuit modeling and simulation methodologies are developed and validated by strong correlation between measurement and simulation results
Keywords :
CMOS integrated circuits; application specific integrated circuits; digital simulation; electric noise measurement; flip-chip devices; integrated circuit modelling; integrated circuit noise; integrated circuit packaging; integrated circuit testing; IC packaging; ball grid array; circuit modeling; flip-chip CMOS ASIC; multilayer ceramic BGA; package test vehicles; simulation methodologies; simultaneous switching noise; test chip; time-domain noise measurement techniques; Application specific integrated circuits; Circuit simulation; Circuit testing; Integrated circuit measurements; Integrated circuit noise; Integrated circuit packaging; Noise measurement; Semiconductor device measurement; Semiconductor device modeling; Switching circuits;
Journal_Title :
Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on
