Title :
A hardware cost minimized fast Phong shader
Author :
Shin, Hyun-Chul ; Lee, Jin-Aeon ; Kim, Lee-Sup
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
fDate :
4/1/2001 12:00:00 AM
Abstract :
One of the most successful algorithms that bring realism to the world of three-dimensional (3-D) image generation is Phong shading. With the continuous improvement in VLSI technology and the demand for higher realism, this algorithm is amenable to the commercially available hardware implementation for real-time rendering in 3-D graphics. Taylor series approximation is appropriate for the hardware implementation of fast Phong shading. However, in this method, the exponentiation of the cosine term requires a very large ROM table. This paper describes the minimization of this overhead in terms of hardware size by proposing an adaptive-compressed nonuniform quantization method. With this method, the ROM table is reduced to 1/64th of the size required for a uniform quantization method while the picture quality is maintained. Due to the reduced ROM table size, the size of the total hardware required for fast Phong shading is minimized to 1/56th of the original size.
Keywords :
VLSI; adaptive signal processing; computer graphic equipment; quantisation (signal); real-time systems; rendering (computer graphics); table lookup; 3D image generation; Phong shading; ROM table; Taylor series approximation; VLSI technology; adaptive-compressed nonuniform quantization method; hardware size; picture quality; real-time rendering; uniform quantization method; Continuous improvement; Costs; Graphics; Hardware; Image generation; Quantization; Read only memory; Rendering (computer graphics); Taylor series; Very large scale integration;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on