Title :
A Josephson ternary associative memory cell
Author :
Morisue, M. ; Suzuki, K.
Author_Institution :
Dept. of Electron. Eng., Saitama Univ., Urawa, Japan
fDate :
3/1/1989 12:00:00 AM
Abstract :
The authors describe a three-valued content-addressable memory cell using a Josephson complementary ternary logic (JCTL) circuit. The memory cell can perform the operations of searching, writing and reading in the ternary logic system. The principle of the memory circuit is illustrated in detail by using the threshold characteristics of the JCTL. Computer simulations were performed to investigate how high-performance operation can be achieved. Simulation results show that the cycle time of memory operation is 120 ps, power consumption is about 0.5 μW/cell, and tolerances of writing and reading operation are ±15% and ±24% respectively
Keywords :
content-addressable storage; integrated memory circuits; superconducting junction devices; superconducting memory circuits; ternary logic; 0.5 muW; 120 ps; JCTL; Josephson complementary ternary logic; Josephson ternary associative memory cell; content-addressable memory cell; cycle time; high-performance operation; power consumption; simulation results; three valued memory cell; threshold characteristics; tolerances; Associative memory; Clocks; Josephson junctions; Logic circuits; Multivalued logic; Read-write memory; SQUIDs; Switches; Voltage; Writing;
Journal_Title :
Magnetics, IEEE Transactions on
