Yield prediction for flip-chip solder assemblies based on solder shape modeling

A model has been developed to predict the yield of flip-chip solder assemblies based on calculated solder shapes. It is a physical model considering a limited number of physical factors such as the mean and the standard deviation of the solder volume distribution, the assembly warpage, the die size, and the number of inputs/outputs (I/O´s). The main features of the model are: (1) the quick calculation of the solder height of every solder joint out of hundreds or thousands of connections; (2) the definition of failure criteria to determine the assembly yield. The quick calculation is accomplished by the use of a force model to estimate molten solder´s normal reaction force corresponding to the solder´s height, volume, circular pad diameter and surface tension coefficient. The failure criteria are height limits determined using surface evolver, which is a public tool for solder shape estimation. Outside the height limits, it is difficult to achieve convergent solutions; therefore, the limits are chosen as failure criteria since they implied large potential manufacturing variations in solder shapes. To illustrate the modeling capability, a case with 1 cm×1 cm chip, 1024 I/O´s is studied. The model shows that a standard deviation of 25% for 4.48 e^-7 cm³ mean solder volume produces low yields. The variance of 19% for 4.48 e^-7 cm³ is required for a 100% yield