A Methodology for Extraction of the Density of Interface States in the Presence of Frequency Dispersion via the Conductance Technique

The density of interface states in the presence of significant frequency dispersion arising from parasitic effects is extracted via the conductance technique. A complete electrical model is presented to highlight the complex nature of parasitic effects, which cannot be explained by conventional models. This technique is successfully applied to MOS capacitors with identical layers of HfO₂/SiO₂ dielectrics but differing in the type of gate. The Poly/TiN gate gives a significant reduction of the EOT; however, the interface state density is found to have increased in comparison with the polysilicon gate.