A Methodology for Extraction of the Density of Interface States in the Presence of Frequency Dispersion via the Conductance Technique

Author

Sicre, Sébastien B F ; De Souza, Maria Merlyne

Author_Institution

Dept. of Electron. & Electr. Eng., Univ. of Sheffield, Sheffield, UK

Volume

57

Issue

7

fYear

2010

fDate

7/1/2010 12:00:00 AM

Firstpage

1642

Lastpage

1650

Abstract

The density of interface states in the presence of significant frequency dispersion arising from parasitic effects is extracted via the conductance technique. A complete electrical model is presented to highlight the complex nature of parasitic effects, which cannot be explained by conventional models. This technique is successfully applied to MOS capacitors with identical layers of HfO₂/SiO₂ dielectrics but differing in the type of gate. The Poly/TiN gate gives a significant reduction of the EOT; however, the interface state density is found to have increased in comparison with the polysilicon gate.

Keywords

MOS capacitors; MOSFET; dielectric materials; electric admittance; electric admittance measurement; electronic density of states; interface states; EOT reduction; HfO₂-SiO₂; HfO₂-SiO₂ dielectrics; MOS capacitors; Si; conductance technique; electrical model; frequency dispersion; gate type; interface state density; parasitic effects; poly-TiN gate; polysilicon gate; Charge pumps; Contact resistance; Current measurement; Dielectric measurements; Dispersion; Electric resistance; Electrical resistance measurement; Frequency; High-K gate dielectrics; Interface states; Conductance; High-$k$, interface states; metal gate; small-signal analysis;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2010.2049208

Filename

5467141