DocumentCode :
1496718
Title :
A low-voltage triggering SCR for on-chip ESD protection at output and input pads
Author :
Chatterjee, Amitava ; Polgreen, Thomas
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
Volume :
12
Issue :
1
fYear :
1991
Firstpage :
21
Lastpage :
22
Abstract :
A novel silicon-controlled rectifier (SCR) structure for on-chip protection against electrostatic discharge (ESD) stress at output or input pads is presented. The SCR switches to an ON state at a trigger voltage determined by the gate length of an incorporated nMOS-like structure. Thus, the new SCR can be designed to consistently trigger at a voltage low enough to protect nMOS transistors from ESD. The capability of a protection circuit using the new SCR design is experimentally demonstrated. The tunability of the SCR trigger voltage with reference to the nMOS breakdown voltage is exploited to improve the human body model (HBM) ESD failure threshold of an output buffer from 1500 to 5000 V.<>
Keywords :
CMOS integrated circuits; MOS integrated circuits; electrostatic discharge; integrated circuit technology; overvoltage protection; surge protection; thyristors; 1.5 to 5 kV; ESD failure threshold; HBM; SCR trigger voltage; human body model; input pads; low-voltage triggering SCR; on-chip ESD protection; on-chip protection; output buffer; output pads; protect nMOS transistors; silicon-controlled rectifier; Breakdown voltage; Circuits; Electrostatic discharge; Low voltage; MOSFETs; Protection; Rectifiers; Stress; Switches; Thyristors;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.75685
Filename :
75685
Link To Document :
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