DocumentCode
1496916
Title
Analogue BiCMOS squarer and its applications
Author
Chang, Cheng-Chieh ; Liu, Shen-Iuan ; Lee, Jiin-Long
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
35
Issue
5
fYear
1999
fDate
3/4/1999 12:00:00 AM
Firstpage
361
Lastpage
363
Abstract
A BiCMOS squarer using active attenuators which has been fabricated in a 10 μm BiCMOS process is presented. Experimental results show that the nonlinearity of the squarer can be kept below 2%, across the entire input voltage range of ±0.3 V. Its -3 dB bandwidth is measured to be ~1 MHz. Moreover, based on the proposed squarer circuits, a four-quadrant multiplier and a vector summation circuit have also been realised. The proposed circuits are expected to be useful in analogue signal processing applications
Keywords
BiCMOS analogue integrated circuits; analogue multipliers; analogue processing circuits; attenuators; -0.3 to 0.3 V; 1 MHz; 10 micron; active attenuators; analogue BiCMOS squarer; analogue signal processing applications; four-quadrant multiplier; vector summation circuit;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19990301
Filename
757116
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