Optimization of RF Performance of Metallic Source/Drain SOI MOSFETs Using Dopant Segregation at the Schottky Interface

This letter presents a detailed investigation of the impact of dopant segregation (DS) on radio-frequency (RF) performance of p-type 110-nm undoped ultrathin-body Schottky-barrier (SB) silicon-on-insulator MOSFETs. It is shown that optimizing this dopant-segregated layer via careful control of the dopant concentration (N _SEG) and lateral extension (L _SEG) reduces the apparent potential barrier height at the Schottky junctions. This results in highly reduced source/drain (S/D) contact resistances, along with a peak f_T value obtained at very low dc power consumption (45 muW/mum at V_DS = -2 V), which is very promising to address low-power low-voltage analog applications. Finally, the source resistance extracted from this RF study ( ~120 Omegamiddotmum) clearly demonstrates the ability of the DS SB S/D architecture to pursue the silicon roadmap beyond the 22-nm node.