• DocumentCode
    1497619
  • Title

    Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems

  • Author

    Ferrandi, Fabrizio ; Lanzi, Pier Luca ; Pilato, Christian ; Sciuto, Donatella ; Tumeo, Antonino

  • Author_Institution
    Dipt. di Elettron. e Inf., Politec. di Milano, Milan, Italy
  • Volume
    29
  • Issue
    6
  • fYear
    2010
  • fDate
    6/1/2010 12:00:00 AM
  • Firstpage
    911
  • Lastpage
    924
  • Abstract
    To exploit the power of modern heterogeneous multiprocessor embedded platforms on partitioned applications, the designer usually needs to efficiently map and schedule all the tasks and the communications of the application, respecting the constraints imposed by the target architecture. Since the problem is heavily constrained, common methods used to explore such design space usually fail, obtaining low-quality solutions. In this paper, we propose an ant colony optimization (ACO) heuristic that, given a model of the target architecture and the application, efficiently executes both scheduling and mapping to optimize the application performance. We compare our approach with several other heuristics, including simulated annealing, tabu search, and genetic algorithms, on the performance to reach the optimum value and on the potential to explore the design space. We show that our approach obtains better results than other heuristics by at least 16% on average, despite an overhead in execution time. Finally, we validate the approach by scheduling and mapping a JPEG encoder on a realistic target architecture.
  • Keywords
    computational complexity; embedded systems; genetic algorithms; multiprocessing systems; scheduling; search problems; simulated annealing; system-on-chip; JPEG encoder; ant colony optimization heuristic; genetic algorithms; heterogeneous embedded systems; multiprocessor embedded platforms; simulated annealing; tabu search; task mapping; task scheduling; Ant colony optimization; Approximation algorithms; Embedded system; Field programmable gate arrays; Genetic algorithms; Processor scheduling; Scheduling algorithm; Simulated annealing; Space exploration; Stochastic processes; Ant colony optimization (ACO); communications; field programmable gate arrays (FPGA); mapping; multiprocessors; scheduling;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2010.2048354
  • Filename
    5467335