DocumentCode :
1497933
Title :
A study of compact thermal model topologies in CFD for a flip chip plastic ball grid array package
Author :
Shidore, Sarang ; Adams, Vance ; Lee, Tien-Yu Tom
Author_Institution :
Flomerics Inc., Austin, TX, USA
Volume :
24
Issue :
2
fYear :
2001
fDate :
6/1/2001 12:00:00 AM
Firstpage :
191
Lastpage :
198
Abstract :
A previously validated detailed model of a 119-pin flip-chip plastic ball grid array (FC-PBGA) package was created and validated against experimental data for natural convection and forced convection environments. Next, two compact models mere derived, a two-resistor model (created using the JEDEC-standard based computational approach), and a multiresistor model (created using the DELPHI optimization approach that was boundary condition independent within engineering accuracy). The compact models were placed in natural convection and forced convection (velocities of 1 and 2 m/s) environments with and without a heatsink. Based on the agreement obtained between the detailed model and compact model simulations, the accuracy and validity of the two compact models was assessed. Of the two compact thermal models considered, the Delphi multiresistor model provided the same predictive estimates (within 5%) as simulations involving a detailed thermal model of the package in natural and forced convection environments both with and without attached heatsinks. Some thermal modeling issues were addressed with respect to implementation of compact thermal models with attached heatsinks
Keywords :
ball grid arrays; computational fluid dynamics; flip-chip devices; forced convection; natural convection; plastic packaging; thermal management (packaging); thermal resistance; DELPHI optimization; JEDEC standard; air cooling; compact thermal model; computational fluid dynamics; flip-chip plastic ball grid array package; forced convection; heat sink; multiresistor model; natural convection; thermal resistance; two-resistor model; Computational fluid dynamics; Electronic packaging thermal management; Electronics packaging; Flip chip; Plastic packaging; Predictive models; Solid modeling; Temperature; Thermal resistance; Topology;
fLanguage :
English
Journal_Title :
Components and Packaging Technologies, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3331
Type :
jour
DOI :
10.1109/6144.926382
Filename :
926382
Link To Document :
بازگشت