DocumentCode :
1498023
Title :
Solder joint crack propagation analysis of wafer-level chip scale package on printed circuit board assemblies
Author :
Lau, John H. ; Chang, Chris ; Lee, S-W Ricky
Author_Institution :
Agilent Technol. Inc., San Jose, CA, USA
Volume :
24
Issue :
2
fYear :
2001
fDate :
6/1/2001 12:00:00 AM
Firstpage :
285
Lastpage :
292
Abstract :
The solder-joint reliability of a low-cost wafer-level chip scale package (WLCSP) on printed circuit board (PCB) under thermal fatigue is studied. The solder joints are subjected to thermal cycling and their crack lengths at different thermal cycles are measured. Also, the stress intensity factors at the crack tip of different crack lengths in the corner solder joint are determined by fracture mechanics with finite element method. Furthermore, an empirical equation for predicting the thermal-fatigue life of flip chip solder joints is proposed
Keywords :
chip scale packaging; crack-edge stress field analysis; finite element analysis; flip-chip devices; fracture mechanics; printed circuit manufacture; reliability; soldering; thermal stress cracking; crack tip stress intensity factor; finite element method; flip-chip solder joint reliability; fracture mechanics; printed circuit board; thermal cycling; thermal fatigue life; wafer-level chip scale package; Chip scale packaging; Equations; Fatigue; Finite element methods; Length measurement; Printed circuits; Semiconductor device measurement; Soldering; Thermal stresses; Wafer scale integration;
fLanguage :
English
Journal_Title :
Components and Packaging Technologies, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3331
Type :
jour
DOI :
10.1109/6144.926395
Filename :
926395
Link To Document :
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