High-Efficiency Differential RF Front-End for a Gen2 RFID Tag

This brief proposes the analysis and design of a high-efficiency differential radio-frequency (RF) front-end for electronic-product-code second-generation-compatible RF identification tags. By studying the operating mechanism of an N-stage rectifier using a dynamic compensation technique, we propose a steady-state model to predict its output voltage and power conversion efficiency (PCE). The model gives insight to specify circuit parameters according to different input and load conditions. To compose the RF front-end, the rectifier is designed along with an envelope detector, a voltage regulator, and a backscattering modulator. The RF front-end is implemented in 0.18-μm standard complementary metal-oxide-semiconductor technology with electrically erasable programmable read-only memory. Both simulation and measurement results verify the proposed steady-state model. The maximum PCE of the RF front-end reaches 43% at -17-dBm incident power.