Title :
Systematic diagnosis of power switches
Author :
Shirley, D. Ruth Anita
Author_Institution :
M.E. VLSI Design, SNS Coll. of Technol., Coimbatore, India
Abstract :
As part of the gating technique, the power switches are used to decrease/reduce the leakage power of a design. Accurate diagnosis of the power switches remains a subject of hidden knowledge that is barely brought to the limelight. The proposed diagnosis method aims to effectively test the power switches. The method is based on segmentation of the power switches to accurately diagnose the presence of any faulty power switches. Validation is made with the help of T-SPICE simulation. Diagnosis is a systematic process to distinctively find the flaw causing malfunction in the design. The fine grain and coarse grain models are examined to find the one that best suits power consumption for further testing. Recent research has reported a number of DFT solutions to test power switches when considering the two possible types of faults: stuck-short and stuck-open. We propose an efficient diagnosis method for power switches using a set of test vectors. Using a coarse-grain style of design, we demonstrate how to divide power switches into segments requiring minimum hardware overhead to achieve high diagnosis accuracy. The proposed approach differs from the other techniques which simulate logic circuit delay at scan or primary outputs to diagnose as well as test the power-switches.
Keywords :
SPICE; delay circuits; fault location; switching circuits; T-SPICE simulation; coarse-grain style; flaw causing malfunction; gating technique; logic circuit delay; minimum hardware overhead; power switches systematic diagnosis; Circuit faults; Discharges (electric); Integrated circuit modeling; Semiconductor device modeling; Switches; Testing; Transistors;
Conference_Titel :
Embedded Systems (ICES), 2014 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-5025-6
DOI :
10.1109/EmbeddedSys.2014.6953045