DocumentCode :
1499545
Title :
Process Integration Considerations for 300 mm TSV Manufacturing
Author :
Ramaswami, Sesh ; Dukovic, John ; Eaton, Brad ; Pamarthy, Sharma ; Bhatnagar, Ajay ; Cao, Zhitao ; Sapre, Kedar ; Wang, Yuchun ; Kumar, Ajay
Author_Institution :
Appl. Mater., Santa Clara, CA, USA
Volume :
9
Issue :
4
fYear :
2009
Firstpage :
524
Lastpage :
528
Abstract :
Through-silicon via (TSV) will transition to high volume production when end-customer value (as exhibited by functionality, performance, form factor, etc.) are delivered at equivalent yield and cost. While this has been successfully achieved for CMOS image sensors (starting with 200 mm), significant work remains to be done in the TSV value chain (design-materials-process-packaging-test) in the communication and memory segments. This paper will address key unit process/process-integration challenges and highlight recent internal/ partner and industry findings in the context of TSV manufacturability at 300 mm.
Keywords :
CMOS image sensors; chemical mechanical polishing; chemical vapour deposition; elemental semiconductors; integrated circuit manufacture; planarisation; silicon; CMOS image sensors; design-materials-process-packaging-test; high volume production; memory segments; size 200 mm; size 300 mm; through-silicon via manufacturing; Chemical vapor deposition (CVD); chemical–mechanical planarization (CMP); electrochemically deposition (ECD); etch; etching; physical vapor deposition (PVD); through-silicon via (TSV);
fLanguage :
English
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
Publisher :
ieee
ISSN :
1530-4388
Type :
jour
DOI :
10.1109/TDMR.2009.2034317
Filename :
5286292
Link To Document :
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