DocumentCode
1499710
Title
A comment on “Improving a nonenumerative method to estimate path delay fault coverage”
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
Volume
18
Issue
5
fYear
1999
fDate
5/1/1999 12:00:00 AM
Firstpage
665
Lastpage
666
Abstract
For the original paper see ibid., vol. 16, no. 7, p. 759-62 (1997). Here Pomeranz and Reddy comment on the aforementioned paper by K. Heragu et al
Keywords
combinational circuits; delays; fault simulation; logic testing; fault simulation; logic circuits; nonenumerative method; path delay fault coverage estimation; Circuit faults; Circuit testing; Cities and towns; Delay estimation; Electrical fault detection; Fault detection; Logic testing;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.759083
Filename
759083
Link To Document