• DocumentCode
    1499856
  • Title

    Designing Custom Arithmetic Data Paths with FloPoCo

  • Author

    De Dinechin, Florent ; Pasca, Bogdan

  • Author_Institution
    Ecole Normale Super. de Lyon, Lyon, France
  • Volume
    28
  • Issue
    4
  • fYear
    2011
  • Firstpage
    18
  • Lastpage
    27
  • Abstract
    Efficient implementation of basic, data-path circuit elements is of fundamental importance to achieving high performance in FPGA-based acceleration of scientific computing. This work presents a leading effort to automate the production of pipelined data-path circuits for implementing numerical functions.
  • Keywords
    field programmable gate arrays; floating point arithmetic; logic design; pipeline arithmetic; FPGA-based acceleration; FloPoCo; custom arithmetic data path design; data-path circuit elements; numerical functions; pipelined data-path circuits; scientific computing; Digital signal processing; Field programmable gate arrays; Generators; Pipeline processing; Synchronization; + C+ FPGAs; FloPoCo; VHDL; arithmetic circuit; core generator; data path; design and test; floating-point; framework; pipelining; reconfigurable computing;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2011.44
  • Filename
    5753874
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1499856