• DocumentCode
    150053
  • Title

    Low power predictive placement cache scheme for embedded system

  • Author

    Upadhyay, Bhargavi R. ; Sudarshan, T.S.B.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Amrita Vishwa Vidyapeetham (Univ.), Bangalore, India
  • fYear
    2014
  • fDate
    3-5 July 2014
  • Firstpage
    250
  • Lastpage
    254
  • Abstract
    The power consumption is crucial for embedded applications which are operated by battery. This paper compares the behavior of instruction cache and data cache of predictive placement scheme using minimal prediction bits on energy efficiency and performance. The performance of predictive placement scheme is evaluated and compared with Way Prediction for instruction cache and data cache. Using proposed scheme, an average energy saving of 71.6% for data cache and 64% for instruction cache can be achieved over conventional set-associative cache scheme. Simplescalar 3.0 simulator is used to obtain the results for Mibench embedded benchmarks.
  • Keywords
    cache storage; embedded systems; energy conservation; power aware computing; Mibench embedded benchmarks; Simplescalar 3.0 simulator; data cache behavior; embedded applications; embedded system; energy efficiency; instruction cache behavior; low power predictive placement cache scheme; minimal prediction bits; power consumption; Accuracy; Benchmark testing; Embedded systems; Energy consumption; Ice; Pipelines; Prediction algorithms; Low power Cache memory design; Mibench embedded benchmark; Predictive placement; Set associative cache;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Embedded Systems (ICES), 2014 International Conference on
  • Conference_Location
    Coimbatore
  • Print_ISBN
    978-1-4799-5025-6
  • Type

    conf

  • DOI
    10.1109/EmbeddedSys.2014.6953167
  • Filename
    6953167