Title :
A 14-bit, 10-Msamples/s D/A converter using multibit ΣΔ modulation
Author :
Falakshahi, Katayoun ; Yang, Chih-Kong Ken ; Wooley, Bruce A.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
fDate :
5/1/1999 12:00:00 AM
Abstract :
A 14-bit digital-to-analog converter based on a fourth-order multibit sigma-delta modulator is described. The digital modulator is pipelined to minimize both its power dissipation and design complexity. The 6-bit output of this modulator is converted to analog using 64 current-steering cells that are continuously calibrated to a reference current. This converter achieves 85-dB dynamic range at 5-MHz signal bandwidth, with an oversampling ratio of 12. The chip was fabricated in a 0.5-μm CMOS technology and operates from a single 2.5-V supply.
Keywords :
CMOS integrated circuits; digital-analogue conversion; modulators; pipeline processing; sigma-delta modulation; 0.5 micron; 14 bit; 2.5 V; 5 MHz; CMOS technology; D/A converter; current-steering cells; design complexity; digital modulator; dynamic range; fourth-order modulator; multibit ΣΔ modulation; oversampling ratio; power dissipation; reference current calibration; signal bandwidth; Analog circuits; Bandwidth; CMOS technology; Clocks; Digital modulation; Digital-analog conversion; Dynamic range; Power dissipation; Semiconductor device noise; Stability;
Journal_Title :
Solid-State Circuits, IEEE Journal of