Title :
An asymmetric memory cell using a C-TFT for single-bit-line SRAM´s
Author :
Kuriyama, Hirotada ; Ashida, Motoi ; Tsutsumi, Kazuhito ; Maegawa, Shigeto ; Maeda, Shigenobu ; Anami, Kenji ; Nishimura, Tadashi ; Kohno, Yoshio ; Miyoshi, Hirokazu
Author_Institution :
ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
fDate :
5/1/1999 12:00:00 AM
Abstract :
This paper proposes a compact single-bit line SRAM memory cell, which we call an asymmetric memory cell (AMC), using a complementary thin-film transistor (C-TFT). A C-TFT is composed of a top-gate n-channel TFT and a bottom-gate p-channel TFT. The proposed cell size can be reduced to 88% as compared with the conventional one using 0.4-μm design rules. Stable read and write operations under low-voltage can be realized by using a C-TFT
Keywords :
SRAM chips; low-power electronics; thin film transistors; C-TFT; asymmetric memory cell; complementary thin film transistor; low voltage operation; single-bit-line SRAM; Driver circuits; Equivalent circuits; MOSFETs; Power supplies; Power system reliability; Random access memory; Signal to noise ratio; Thin film transistors; Threshold voltage; Writing;
Journal_Title :
Electron Devices, IEEE Transactions on
