In Situ Doped Source/Drain for Performance Enhancement of Double-Gated Poly-Si Nanowire Transistors

Author

Chen, Wei-Chen ; Lin, Horng-Chih ; Chang, Yu-Chia ; Lin, Chuan-Ding ; Huang, Tiao-Yuan

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

Volume

57

Issue

7

fYear

2010

fDate

7/1/2010 12:00:00 AM

Firstpage

1608

Lastpage

1615

Abstract

A poly-Si nanowire (NW) thin-film transistor configured with the double-gated scheme was fabricated and characterized. The fabrication process features the clever use of selective plasma etching to form a rectangular NW underneath a hard mask. In this paper, we show that replacing the original ion-implanted poly-Si with in situ doped poly-Si for the source/drain significantly enhances the device performance, including steeper subthreshold swing (SS), larger on/off current ratio, and reduced series resistance. In particular, the SS is improved to a record-breaking low value of 73 mV/dec, which, to the best of our knowledge, is the most ideal ever reported for a poly-Si based device. The new NW transistors with such excellent switching properties are highly promising for reducing power consumption and operational voltage in practical circuit applications.

Keywords

nanowires; sputter etching; thin film transistors; doped source/drain; double-gated scheme; fabrication process; nanowire transistors; operational voltage; performance enhancement; power consumption; reduced series resistance; selective plasma etching; subthreshold swing; switching properties; thin film transistor; Crystallization; Doping; Etching; Fabrication; Microelectronics; Plasma applications; Plasma devices; Plasma sources; Substrates; Thin film transistors; in situ doping; Field-effect transistor; leakage; multiple gate; nanowire (NW); polycrystalline-Si (poly-Si);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2010.2049227

Filename

5471146