Title :
Seesaw Relay Logic and Memory Circuits
Author :
Jeon, Jaeseok ; Pott, Vincent ; Kam, Hei ; Nathanael, Rhesa ; Alon, Elad ; Liu, Tsu-Jae King
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA
Abstract :
Various logic functions can be implemented by appropriately biasing a single seesaw relay. The seesaw relay can also be configured as a bistable latch so that a memory cell can be implemented with one relay and one access transistor. Measurements of seesaw relay switching speed are well matched to lumped-parameter modeling results.
Keywords :
logic circuits; memory architecture; micromechanical devices; MEMS systems; access transistor; bistable latch configuration; logic functions; lumped-parameter are modeling results; memory cell; memory circuits; seesaw relay logic; seesaw relay switching speed; Microelectromechanical systems; nanoelectromechanical systems; relay logic and memory circuits;
Journal_Title :
Microelectromechanical Systems, Journal of
DOI :
10.1109/JMEMS.2010.2049826
