DocumentCode :
1502038
Title :
Hardware/software cost analysis of interrupt processing strategies
Author :
Samadzadeh, Mansur H. ; Garalnabi, Loai E.
Author_Institution :
Dept. of Comput. Sci., Oklahoma State Univ., Stillwater, OK, USA
Volume :
21
Issue :
3
fYear :
2001
Firstpage :
69
Lastpage :
76
Abstract :
A new study compares the architectural design and implementation costs of five strategies that let pipelined processors support precise interrupts. Hardware dominates the cost of all strategies except checkpoint repair, which, depending on the implementation, can incur either high software or hardware costs
Keywords :
interrupts; pipeline processing; system recovery; architectural design; checkpoint repair; hardware/software cost analysis; implementation costs; interrupt processing strategies; pipelined processors; precise interrupts; Buffer storage; Costs; Counting circuits; Hardware; History; Registers; Software algorithms; Software maintenance;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.928766
Filename :
928766
Link To Document :
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