• DocumentCode
    1502087
  • Title

    A Novel Self-Aligned 4-Bit SONOS-Type Nonvolatile Memory Cell With T-Gate and I-Shaped FinFET Structure

  • Author

    Lee, Sunyeong ; Jeon, Yong Woo ; Liu, Tsu-Jae King ; Kim, Dae Hwan ; Kim, Dong Myong

  • Author_Institution
    Sch. of Electr. Eng., Kookmin Univ., Seoul, South Korea
  • Volume
    57
  • Issue
    8
  • fYear
    2010
  • Firstpage
    1728
  • Lastpage
    1736
  • Abstract
    We propose a novel 4-bit self-aligned SONOS-type nonvolatile memory (NVM) cell with a T-gate and I-shaped FinFET structure for practical implementation with high storage density and better reliability. In order to obtain enhanced reliability characteristics, a modified Fowler-Nordheim tunneling mechanism is employed for programming along the channel length direction, while a band-to-band hot hole injection is used for erasing along the channel width direction. With separated paths for program and erase, improved device performance is obtained with sensing margin. In order to improve the immunity to second-bit effects, the gate-induced drain leakage current method, which is a charge detection method and highly sensitive to the locally stored charges, is employed for the reading of the stored data. In terms of the scalability, we confirmed by 2-D technology computer-aided design simulation that the proposed NVM cell with channel length L = 50 nm operates with enough sensing margin and high-density ( ~ 5 F2/bit) NVM by the crossed cell array architecture.
  • Keywords
    MOSFET; memory architecture; 2D technology computer-aided design simulation; Fowler-Nordheim tunneling mechanism; I-shaped FinFET structure; SONOS-type nonvolatile memory cell; T-gate; band-to-band hot hole injection; channel width direction; charge detection method; crossed cell array architecture; gate-induced drain leakage current method; size 50 nm; Computational modeling; Computer simulation; Design automation; FinFETs; Hot carriers; Leak detection; Leakage current; Nonvolatile memory; Scalability; Tunneling; Double gate; Fowler–Nordheim (F-N) tunneling; field-effect transistor; fin field-effect transistor (FinFET); gate-induced drain leakage (GIDL); multibit memory; nonvolatile memory (NVM); silicon-oxide-nitride-oxide-silicon (SONOS);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2010.2049672
  • Filename
    5471245