On Basic Financial Decimal Operations on Binary Machines

Author

Aswal, Abhilasha ; Perumal, M. Ganesh ; Prasanna, G. N Srinivasa

Author_Institution

Educ. & Res. Dept., Infosys Ltd., Bangalore, India

Volume

61

Issue

8

fYear

2012

Firstpage

1084

Lastpage

1096

Abstract

Financial transactions are specified in decimal arithmetic. Until the introduction of IEEE 754-2008, specialized software/hardware routines were used to perform these transactions but it incurred a penalty on performance. In this paper, we show that if binary arithmetic is used to emulate decimal operations, then arbitrary error sequences can be generated by carefully chosen sequences of transactions which can lead to monotonically increasing/decreasing capitalization errors. In addition, we describe methods for correctly performing basic decimal operations, such as addition, subtraction, multiplication, and division, on binary machines, which are not conformant with IEEE 754-2008 decimal floating point standard (ISO/IEC/IEEE 60559:2011), at high speed.

Keywords

IEEE standards; financial data processing; floating point arithmetic; transaction processing; IEEE 754-2008 decimal floating point standard; arbitrary error sequences; binary arithmetics; binary machines; capitalization errors; decimal arithmetics; decimal operations; financial decimal operations; financial transactions; software-hardware routines; Approximation methods; Equations; Hardware; IEEE standards; Mathematical model; Software libraries; Floating-point arithmetic; IEEE 754 standards; computer arithmetic.;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/TC.2012.89

Filename

6189314