Process Technology Variation

Author

Kuhn, Kelin J. ; Giles, Martin D. ; Becher, David ; Kolar, Pramod ; Kornfeld, Avner ; Kotlyar, Roza ; Ma, Sean T. ; Maheshwari, Atul ; Mudanai, Sivakumar

Author_Institution

Components Res. Group, Intel Corp., Hillsboro, OR, USA

Volume

58

Issue

8

fYear

2011

Firstpage

2197

Lastpage

2208

Abstract

Moore´s law technology scaling has improved performance by five orders of magnitude in the last four decades. As advanced technologies continue the pursuit of Moore´s law, a variety of challenges will need to be overcome. One of these challenges is the management of process variation. This paper discusses the importance of process variation in modern transistor technology, reviews front-end variation sources, presents device and circuit variation measurement techniques, including circuit and memory data from the 32-nm node, and compares recent intrinsic transistor variation performance from the literature.

Keywords

CMOS memory circuits; SRAM chips; Moore law technology; circuit data; circuit variation measurement technique; front end variation source; intrinsic transistor variation performance; memory data; modern transistor technology; process variation management; size 32 nm; Arrays; Random access memory; Ring oscillators; Systematics; Transistors; $V_{rm ccmin}$; Complementary metal–oxide–semiconductor (CMOS); static random access memory (SRAM); variation;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2011.2121913

Filename

5755188