Title :
Low-voltage fourth-order CMOS sigma-delta modulator implementation
Author :
Lampinen, H. ; Vainio, O.
Author_Institution :
Lab. of Digital & Comput. Syst., Tampere Univ. of Technol., Finland
fDate :
6/7/2001 12:00:00 AM
Abstract :
A low-voltage, high-speed, fourth-order sigma-delta modulator implementation is presented. The low-voltage and high-speed operation are obtained by using a novel combination of architectural features, proper circuit structure selections, specific clocking strategies, and efficient circuit optimisation algorithms. Measurement results from fabricated CMOS chip prototypes show a good match with simulations
Keywords :
CMOS integrated circuits; circuit optimisation; high-speed integrated circuits; low-power electronics; mixed analogue-digital integrated circuits; modulators; sigma-delta modulation; timing; A/D convertors; ADC; ASIC; CMOS sigma-delta modulator implementation; LV fourth-order sigma-delta modulator; circuit optimisation algorithms; clocking strategies; high-speed operation; low-voltage operation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20010502
