Decoder-Optimised Progressive Edge Growth Algorithms for the Design of LDPC Codes with Low Error Floors

Author

Healy, C.T. ; de Lamare, R.C.

Author_Institution

Dept. of Electron., Univ. of York, York, UK

Volume

16

Issue

6

fYear

2012

fDate

6/1/2012 12:00:00 AM

Firstpage

889

Lastpage

892

Abstract

A novel construction for irregular low-density parity-check (LDPC) codes based on a modification of the Progressive Edge Growth (PEG) algorithm is presented. Edge placement of the PEG algorithm is enhanced by use of the Sum-Product algorithm in the design of the parity-check matrix. The proposed algorithm is highly flexible in block length and rate. The codes constructed by the proposed methods are tested in the AWGN channel and significant performance improvements are achieved. The flexibility of the proposed decoder optimisation operation is then shown by its use in modifying the Improved PEG (IPEG) algorithm to achieve further performance gains.

Keywords

AWGN channels; channel coding; decoding; matrix algebra; optimisation; parity check codes; AWGN channel; IPEG algorithm; LDPC code design; block length; decoder optimisation; decoder-optimised progressive edge growth algorithm; edge placement; improved PEG algorithm; irregular low-density parity check codes; low error floors; parity check matrix; performance gains; sum-product algorithm; Algorithm design and analysis; Decoding; Measurement; Parity check codes; Performance gain; Phase change materials; Signal to noise ratio; Low-density parity-check codes; Progressive Edge Growth (PEG) algorithm;

fLanguage

English

Journal_Title

Communications Letters, IEEE

Publisher

ieee

ISSN

1089-7798

Type

jour

DOI

10.1109/LCOMM.2012.042312.112220

Filename

6189817