Title :
Fully static processor-optimal assignment of data-flow graphs
Author :
Ho, Yeh-Chin ; Tsay, Jong-Chuang
Author_Institution :
Inst. of Comput. Sci. & Inf. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
5/1/1997 12:00:00 AM
Abstract :
The data-flow graph (DFG) is an important graph-theoretic model for multiprocessor implementation of real-time digital signal processing (DSP) algorithms. Given a time schedule for a DFG, we consider the problem of the processor-optimal assignment for a fully static schedule. Previously, the solution of this problem was found by solving an integer programming problem. We propose a linear programming approach to solving the problem.
Keywords :
data flow graphs; graph theory; linear programming; multiprocessing programs; processor scheduling; signal processing; DSP algorithms; data flow graphs; fully static processor-optimal assignment; fully static schedule; graph theoretic model; linear programming; multiprocessor implementation; real-time digital signal processing algorithms; static processor; time schedule; Computer science; Delay effects; Digital signal processing; Linear programming; Processor scheduling; Scheduling algorithm; Signal processing algorithms;
Journal_Title :
Signal Processing Letters, IEEE
