Title :
BSG-Route: A Length-Constrained Routing Scheme for General Planar Topology
Author :
Yan, Tan ; Wong, Martin D F
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
Abstract :
Length-constrained routing is a very important issue for printed circuit board (PCB) routing. Previous length-constrained routers all have assumptions on the routing topology, whereas practical designs may be free of any topological constraint. In this paper, we propose a routing scheme that deals with general topology. Unlike previous works, our approach does not impose any restriction on the routing topology. Moreover, our routing scheme is gridless. Its performance does not depend on the routing grid size of the input while the routers in the papers of Ozdal and Wong and Kubo do. This is a big advantage because modern PCB routing configurations usually imply huge routing grids. The novelty of this work is that we view the length-constrained routing problem as an area assignment problem and use a placement structure, which is the bounded-sliceline grid, to help transform the area assignment problem into a mathematical programming problem. We then use an iterative approach to solve this mathematical programming problem. Experimental results show that our routing scheme can handle practical designs that previous routers cannot handle. For designs that they could handle, our router runs much faster. For example, in one of our data, we obtain the result in 88 s while the Lagrangian relaxation based router by Ozdal and Wong takes more than one day.
Keywords :
network routing; network topology; printed circuits; BSG-route; Lagrangian relaxation based router; PCB; bounded-sliceline grid; general planar topology; length-constrained routing scheme; mathematical programming problem; printed circuit board routing; routing topology; Circuit topology; Clocks; Frequency; Iterative methods; Lagrangian functions; Large-scale systems; Linear programming; Mathematical programming; Printed circuits; Routing; Algorithms; linear programming (LP); printed circuit layout; routing;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2009.2030352