Title :
Packed U Cells Multilevel Converter Topology: Theoretical Study and Experimental Validation
Author :
Ounejjar, Youssef ; Al-Haddad, Kamal ; Gregoire, Luc-André
Author_Institution :
Dept. of Electr. Eng., Ecole De Technol. Super., Montréal, QC, Canada
fDate :
4/1/2011 12:00:00 AM
Abstract :
In this paper, authors propose a new power multilevel converter topology that is very competitive compared to the existing ones. It consists of packed U cells (PUC). Each U cell consists of an arrangement of two power switches and one capacitor. It offers high-energy conversion quality using a small number of capacitors and power devices and consequently, has a very low production cost. An averaged model of the topology is detailed. The operating principle of the transformerless seven-level inverter is analyzed and detailed. The multilevel sinusoidal modulation has been adapted for use with the PUC-based structure. The control strategy has been designed to reduce the harmonic contents of the load voltage. With such converters, filters´ rating is considerably reduced. A comparative study is performed to highlight the advantages of the new packed U cells topology. The operation of the proposed converter topology has been verified through simulation. Experimental validation was performed using DS1103 DSP of dSpace.
Keywords :
digital signal processing chips; invertors; power capacitors; power convertors; power harmonic filters; DS1103 DSP; dSpace; harmonic content; multilevel sinusoidal modulation; operating principle; packed U cells multilevel converter topology; power switch; transformerless seven level inverter; Capacitors; Costs; Digital signal processing; Inverters; Power conversion; Power harmonic filters; Power quality; Power system harmonics; Topology; Voltage control; DSP implementation; harmonics; multilevel converter topologies; power quality; unity power factor operation;
Journal_Title :
Industrial Electronics, IEEE Transactions on
DOI :
10.1109/TIE.2010.2050412