• DocumentCode
    1506674
  • Title

    Packaging of integrated solid-state power assembly cells: a thermomechanics-based approach

  • Author

    Shaw, Michael C. ; Beihoff, Bruce C.

  • Author_Institution
    Dept. of Design & Reliability, Rockwell Inst. Sci. Center, Thousand Oaks, CA, USA
  • Volume
    89
  • Issue
    6
  • fYear
    2001
  • fDate
    6/1/2001 12:00:00 AM
  • Firstpage
    856
  • Lastpage
    863
  • Abstract
    The design of integrated solid-state power assemblies presents unique challenges originating from the high current, voltage, and temperature levels at which they operate. Specifically, they are subject to high levels of internal mechanical stress owing to the dissimilar materials from which they are fabricated coupled with the higher temperatures and currents that develop within the modules during their operation. However, as future demands grow for compact power assemblies with ever-increasing controlled-power density coupled with low cost and straightforward manufacturability, the necessity for a predictive capability for their reliability is greater than ever. Surprisingly, despite the lack of a widely accepted methodology for such designs, much of the basic knowledge is in place. Therefore, the goal of this article is to summarize the main modes of failure in power assemblies, the corresponding material degradation mechanisms and driving forces, and the material properties that are required to help stimulate further developments in this area. A vital component of the approach presented here is to base the understanding on a rigorous knowledge of the physics involved in failure
  • Keywords
    reliability; semiconductor device packaging; thermal management (packaging); compact power assemblies; controlled-power density; driving forces; high current; high temperature; high voltage; integrated solid-state power assembly cells; internal mechanical stress; material degradation mechanisms; packaging; reliability; thermomechanics-based approach; Assembly; Costs; Degradation; Design methodology; Manufacturing; Packaging; Solid state circuits; Stress; Temperature; Voltage;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/5.931476
  • Filename
    931476