Substrate crosstalk reduction using SOI technology

Author

Raskin, Jean-Pierre ; Viviani, Alberto ; Flandre, Denis ; Colinge, Jean-Pierre

Author_Institution

Microwave Labs., Katholieke Univ., Leuven, Belgium

Volume

44

Issue

12

fYear

1997

fDate

12/1/1997 12:00:00 AM

Firstpage

2252

Lastpage

2261

Abstract

This work analyzes both by simulations and measurements the substrate crosstalk performances of various Silicon-On-Insulator (SOI) technologies, and compares them to those of normal bulk CMOS process. The influence of various parameters, such as substrate resistivity, buried oxide thickness and distance between devices, is investigated. The use of capacitive guard rings is proposed, and their effectiveness is demonstrated. A simple RC model has been developed to allow a deep understanding of these phenomena as well as to simplify future studies of more complex systems. The superiority of high-resistivity SIMOX substrates over standard SOI and bulk is finally demonstrated

Keywords

MOS integrated circuits; SIMOX; crosstalk; integrated circuit modelling; mixed analogue-digital integrated circuits; silicon-on-insulator; MOS ICs; RC model; SIMOX substrates; SOI technology; buried oxide thickness; capacitive guard rings; substrate crosstalk reduction; substrate resistivity; CMOS technology; Circuit noise; Coupling circuits; Crosstalk; Frequency; Performance analysis; Silicon on insulator technology; Switching circuits; Voltage; Working environment noise;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.644646

Filename

644646