Title :
Secure random number generation using chaotic circuits
Author :
Bernstein, G.M. ; Lieberman, M.A.
Author_Institution :
Ford Aerosp. Corp., San Jose, CA, USA
fDate :
9/1/1990 12:00:00 AM
Abstract :
The authors suggest a class of circuits for generating secure pseudo-random numbers and estimate the security of these generators from the information loss property of chaotic systems. For a generator implemented using a chaotic DPLL (digital phase-locked loop), two important cases are considered: (1) given no prior information concerning the initial conditions of a continuously running circuit, the length of time one should wait after taking a bit before one can securely take another bit is established; and (2) given knowledge of the initial conditions at startup (up to measurement and noise uncertainty), the length of time one should wait before starting the bit sampling is shown
Keywords :
chaos; phase-locked loops; random number generation; DPLL; bit sampling; chaotic circuits; chaotic systems; continuously running circuit; information loss property; random number generation; secure pseudo-random numbers; startup; Chaos; Circuits; Information security; Length measurement; Measurement uncertainty; Noise measurement; Phase locked loops; Phase measurement; Random number generation; Time measurement;
Journal_Title :
Circuits and Systems, IEEE Transactions on