Compression of the load resistance range in constant frequency resonant inverters

Wide-range load variations in resonant power conversion systems can lead to loss of unity power factor at the output of a switching inverter stage, increasing the circulating reactive energy through the switches and power loss. The load-variation problem can be significantly reduced with use of dedicated circuitry that would “compress” the variation of the load resistance to a smaller range. Current work in the field of power electronics examines a particular compression solution for dc-dc resonant conversion. However, the use of this solution in dc-ac conversion is not possible since a diode rectifying stage is required. Thus, this paper investigates the existence of a generalized solution to the resistance compression network problem for both dc-dc and dc-ac conversion. A practical case such as a two-port linear, time-invariant lossless network is examined. It is mathematically shown that such a range-compression circuit is not feasible. A solution is found as a time-variant circuit modification to the examined network. An example of a practical topology that compresses [10 Ω, 100 Ω] range to [1 Ω, 6 Ω] resistance range is presented. The feasibility of the design is verified via simulation. In addition, theoretical aspects of the resistance-range compression are presented.