Title :
Insulated gate driver for eGaN FET
Author :
Delaine, Johan ; Jeannin, Pierre-Olivier ; Frey, D. ; Guepratte, Kevin
Author_Institution :
G2Elab, Univ. Grenoble Alpes, Grenoble, France
Abstract :
EPC eGaN transistors have demonstrated performance improvements in comparison with Si MOSFETs ([1], [2] and [3]) but their gate is sensitive to overvoltage (recommended gate source voltage is 5V and the maximum is 6V). In this paper, an efficient insulated and fast gate driver topology is investigated considering parasitic elements. Then, a theoretical and experimental comparison is made. An IC is realized to reduce the gate circuit parasitic elements and its performances are compared with other gate circuit topologies.
Keywords :
III-V semiconductors; driver circuits; gallium compounds; insulated gate field effect transistors; network topology; overvoltage; wide band gap semiconductors; EPC transistor; FET; GaN; gate circuit parasitic elements reduction; insulated gate driver topology; overvoltage; Capacitance; Circuit faults; Logic gates; Power transformer insulation; Resistance; Topology; Transistors;
Conference_Titel :
Energy Conversion Congress and Exposition (ECCE), 2014 IEEE
Conference_Location :
Pittsburgh, PA
DOI :
10.1109/ECCE.2014.6953785
