Title :
Mixed-signal calibration of sample-time error in time-interleaved ADCs
Author :
Zhang, Peng ; Ye, Feng ; Yu, Bei ; Luo, Lei ; Ren, Jinchang
Author_Institution :
State-Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
A mixed-signal scheme is presented to calibrate sample-time error in time-interleaved (TI) analogue-to-digital converters (ADCs). Based on the information collected by the timing error detection subsystem through digital processing, sample-time error is corrected using the proposed voltage-controlled bootstrapped switch. A two-channel TI-ADC system of 14-bit 200 MS/s has been implemented to evaluate the performance of the technique. Simulation results show that the ADC system achieves a 77.4 dB SNDR and an 84.3 dB SFDR at 97.7 MHz after calibration.
Keywords :
analogue-digital conversion; bootstrap circuits; calibration; timing; digital processing; frequency 97.7 MHz; mixed-signal calibration; sample-time error; time-interleaved analogue-to-digital converters; timing error detection; voltage-controlled bootstrapped switch; word length 14 bit;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2011.0547
