Title :
Off-State Degradation of High-Voltage-Tolerant nLDMOS-SCR ESD Devices
Author :
Griffoni, Alessio ; Chen, Shih-Hung ; Thijs, Steven ; Kaczer, Ben ; Franco, Jacopo ; Linten, Dimitri ; De Keersgieter, An ; Groeseneken, Guido
Author_Institution :
Interuniversity Microelectron. Center, Leuven, Belgium
fDate :
7/1/2011 12:00:00 AM
Abstract :
The OFF-state degradation of n-channel laterally diffused metal-oxide-semiconductor (MOS) silicon-controlled-rectifier electrostatic-discharge (ESD) devices for high-voltage applications in standard low-voltage complementary MOS technology is studied. Based on experimental data and technology computer-aided design simulations, impact ionization induced by conduction-band electrons tunneling from an n+ poly-Si gate to an n-well is identified to be the driving force of device degradation. Device optimization is proposed, which improves both OFF-state and ESD reliability.
Keywords :
MOS-controlled thyristors; MOSFET; electrostatic discharge; optimisation; semiconductor device reliability; technology CAD (electronics); tunnelling; ESD reliability; OFF-state degradation; conduction-band electron tunneling; device optimization; electrostatic discharge device; high-voltage tolerant nLDMOS-SCR ESD device; ionization impact; low-voltage complementary MOS technology; n-channel laterally diffused metal-oxide semiconductor silicon controlled rectifier device; n-well; n+ poly-Si gate; technology computer aided design simulation; Charge carrier processes; Degradation; Electrostatic discharge; Logic gates; Silicon; Stress; Thyristors; Charged device model (CDM); electrostatic discharge (ESD); human body model (HBM); input/output; laterally diffused metal–oxide–semiconductor (LDMOS); mixed signal; reliability; silicon-controlled rectifier (SCR); transmission line pulsing (TLP);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2011.2132760
