• DocumentCode
    1511733
  • Title

    Data parallel fault simulation

  • Author

    Amin, Minesh B. ; Vinnakota, Bapiraju

  • Author_Institution
    Synopsys, Mountain View, CA, USA
  • Volume
    7
  • Issue
    2
  • fYear
    1999
  • fDate
    6/1/1999 12:00:00 AM
  • Firstpage
    183
  • Lastpage
    190
  • Abstract
    Fault simulation is a computer-intensive problem. Parallel processing is one method to reduce simulation time. In this paper, we discuss a technique to partition the fault set for fault-parallel simulation on multiple processors. When applied statically, the technique can scale well for up to 32 processors. The fault-set partitioning technique is simple and can itself be parallelized. Existing uniprocessor algorithms, based on parallel-pattern simulation, can be used for multiprocessor simulation without modification. Therefore, the techniques can be used effectively on a low-cost parallel resource such as a network of workstations.
  • Keywords
    fault simulation; logic CAD; logic partitioning; logic simulation; parallel processing; data parallel fault simulation; fault set partitioning; logic gate level; low-cost parallel resource; multiple processors; simulation time; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer simulation; Electrical fault detection; Integrated circuit testing; Parallel processing; Partitioning algorithms; Workstations;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/92.766745
  • Filename
    766745