DocumentCode :
1511754
Title :
A coding framework for low-power address and data busses
Author :
Ramprasad, Sumant ; Shanbhag, Naresh R. ; Hajj, Ibrahim N.
Author_Institution :
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
Volume :
7
Issue :
2
fYear :
1999
fDate :
6/1/1999 12:00:00 AM
Firstpage :
212
Lastpage :
221
Abstract :
This paper presents a source-coding framework for the design of coding schemes to reduce transition activity. These schemes are suited for high-capacitance buses where the extra power dissipation due to the encoder and decoder circuitry is offset by the power savings at the bus. In this framework, a data source (characterized in a probabilistic manner) is first passed through a decorrelating function f/sub 1/. Next, a variant of entropy coding function f/sub 2/ is employed, which reduces the transition activity. The framework is then employed to derive novel encoding schemes whereby practical forms for f/sub 1/ and f/sub 2/ are proposed. Simulation results with an encoding scheme for data buses indicate an average reduction in transition activity of 36%. This translates into a reduction in total power dissipation for bus capacitances greater than 14 pF/b in 1.2 /spl mu/m CMOS technology. For a typical value for bus capacitance of 50 pF/b, there is a 36% reduction in power dissipation and eight times more power savings compared to existing schemes. Simulation results with an encoding scheme for instruction address buses indicate an average reduction in transition activity by a factor of 1.5 times over known coding schemes.
Keywords :
CMOS digital integrated circuits; VLSI; capacitance; circuit CAD; high level synthesis; integrated circuit design; low-power electronics; source coding; CMOS VLSI design; decoder circuitry; decorrelating function; encoder circuitry; entropy coding function; high-capacitance bus; low-power address buses; low-power data buses; power dissipation; source-coding framework; transition activity reduction; CMOS technology; Capacitance; Circuits; Decoding; Decorrelation; Encoding; Entropy coding; Power dissipation; Reflective binary codes; Very large scale integration;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/92.766748
Filename :
766748
Link To Document :
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