Microprocessor memory management units

Author

Milenkovic, Milan

Author_Institution

IBM Corp., Boca Raton, FL, USA

Volume

10

Issue

2

fYear

1990

fDate

4/1/1990 12:00:00 AM

Firstpage

70

Lastpage

85

Abstract

This tutorial describes the current crop of commercial memory management units (MMUs) for 32-bit microprocessors. The discussion includes both complex- and reduced-instruction-set computers (CISCs and RISCs). The rationale, principles, and issues related to hardware support for memory management and virtual memory are reviewed. The design and features of high-end microprocessor MMUs are reviewed and compared with respect to a common set of criteria. Special attention is paid to Unix requirements and multiprocessor, multiple MMU considerations. The MMUs covered are Intel 80386, i486, and i860; Motorola´s 68851 (MMU for the 68020), 68030, 68040, and 88200 (MMU for the 88000 series); the Fujitsu MB86920 (Sparc MMU); and the MIPS R2000/R3000.<>

Keywords

microprocessor chips; storage management chips; virtual storage; 32 bit; 32-bit microprocessors; 68020; 68030; 68040; 68851; 88000; 88200; CISCs; MB86920; MIPS R2000; R3000; RISCs; Sparc MMU; Unix requirements; i486; i860; memory management units; multiple MMU; multiprocessor; virtual memory; Computer aided instruction; Crops; Hardware; Memory management; Microprocessors; Multitasking; Operating systems; Protection; Reduced instruction set computing; Resource management;

fLanguage

English

Journal_Title

Micro, IEEE

Publisher

ieee

ISSN

0272-1732

Type

jour

DOI

10.1109/40.52948

Filename

52948