• DocumentCode
    1513520
  • Title

    Piecewise Linearization Technique for Compact Charge Modeling of Independent DG MOSFET

  • Author

    Jandhyala, Srivatsava ; Abraham, Aby ; Anghel, Costin ; Mahapatra, Santanu

  • Author_Institution
    Dept. of Electron. Syst. Eng. (formerly CEDT), Indian Inst. of Sci., Bangalore, India
  • Volume
    59
  • Issue
    7
  • fYear
    2012
  • fDate
    7/1/2012 12:00:00 AM
  • Firstpage
    1974
  • Lastpage
    1979
  • Abstract
    Charge linearization techniques have been used over the years in advanced compact models for bulk and double-gate MOSFETs in order to approximate the position along the channel as a quadratic function of the surface potential (or inversion charge densities) so that the terminal charges can be expressed as a compact closed-form function of source and drain end surface potentials (or inversion charge densities). In this paper, in case of the independent double-gate MOSFETs, we show that the same technique could be used to model the terminal charges quite accurately only when the 1-D Poisson solution along the channel is fully hyperbolic in nature or the effective gate voltages are same. However, for other bias conditions, it leads to significant error in terminal charge computation. We further demonstrate that the amount of nonlinearity that prevails between the surface potentials along the channel actually dictates if the conventional charge linearization technique could be applied for a particular bias condition or not. Taking into account this nonlinearity, we propose a compact charge model, which is based on a novel piecewise linearization technique and shows excellent agreement with numerical and Technology Computer-Aided Design (TCAD) simulations for all bias conditions and also preserves the source/drain symmetry which is essential for Radio Frequency (RF) circuit design. The model is implemented in a professional circuit simulator through Verilog-A, and simulation examples for different circuits verify good model convergence.
  • Keywords
    MOSFET; semiconductor device models; technology CAD (electronics); 1-D Poisson solution; compact charge modeling; effective gate voltages; independent double-gate MOSFET; piecewise linearization technique; quadratic function; radio frequency circuit design; surface potential; technology computer-aided design; Electric potential; Integrated circuit modeling; Linearization techniques; Logic gates; Mathematical model; Numerical models; Circuit simulation; compact modeling; double-gate MOSFET; terminal charge;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2012.2193887
  • Filename
    6197704