Enhancement-mode power heterojunction FET utilizing Al0.5Ga0.5As barrier layer with negligible operation gate current for digital cellular phones

We have developed a novel enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET (HJFET) with a 5 nm thick Al_0.5Ga_0.5As barrier layer inserted between an In _0.2Ga_0.8As channel layer and an upper Al_0.2 Ga_0.8As electron supply layer. The Al_0.5Ga _0.5As barrier layer reduces gate current under high forward gate bias voltage, resulting in a high forward gate turn-on voltage (V _F) of 0.87 V, which is 170 mV higher than that of an HJFET without the barrier layer. Suppression of gate current assisted by a parallel conduction path in the upper electron supply layer was found to be also important for achieving the high V_F. The developed device exhibited a high maximum drain current of 300 mA/mm with a threshold voltage of 0.17 V. A 950 MHz PDC power performance was evaluated under single 3.5 V operation. An HJFET with a 0.5 μm long gate exhibited 0.92 W output power and 63.6% power-added efficiency with 0.08 mA gate current (I_g) at -48 dBc adjacent channel leakage power at 50 kHz off-center frequency. This I_g is one-thirteenth to that of the HJFET without the barrier layer. These results indicate that the developed enhancement-mode HJFET is suitable for single low voltage operation power applications