Title :
Bandwidth optimization of flash memories with the RGP technique
Author :
Versari, Roberto ; Esseni, David ; Falavigna, Gianluca ; Lanzoni, Massimo ; Riccò, Bruno
Author_Institution :
Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy
fDate :
8/1/2001 12:00:00 AM
Abstract :
A simple expression for the number of bits that can be programmed per unit time (bandwidth or BW) in flash memories with the ramped gate programming (RGP) technique is used to optimize memory BW and derive design curves. Preliminary experimental results obtained with common-ground NOR flash memory arrays realized with 0.25 μm technology show that memory BW can: (1) exceed of 10 Mb/s with optimized cell programming and (2) be negatively affected by device scaling
Keywords :
PLD programming; circuit optimisation; flash memories; EEPROM arrays; bandwidth optimization; channel length dependence; common-ground NOR flash memory arrays; design curves; flash memories; injection efficiency; optimized cell programming; ramped gate programming technique; Bandwidth; Design optimization; Displacement control; EPROM; Flash memory; Nonvolatile memory; Proportional control; Random access memory; Throughput; Voltage control;
Journal_Title :
Electron Devices, IEEE Transactions on
