DocumentCode :
151437
Title :
Partial 5/3 level topology for solar grid-tie inverters
Author :
Ginart, Antonio ; Liou, Richard ; Salazar, Addisson ; Restrepo, Carlos ; Ernst, Michael
Author_Institution :
SOLARMAX, Norcross, GA, USA
fYear :
2014
fDate :
14-18 Sept. 2014
Firstpage :
5736
Lastpage :
5742
Abstract :
Solar inverters are designed specifically to handle photovoltaic (PV) panels, to efficiently extract the most amount of power, and to transform it properly so that it can be injected into the grid. The singularities of the application allow for opportunities that can be exploited for better performance. Inverters for PV applications are designed to operate at very low voltage variations, almost at a fixed frequency, and with a power factor usually greater than 0.8. While keeping these inverter-specific characteristics in mind, a new topology is proposed. In this work, such new topology provides operational characteristics close to a 5-level topology. This achievement is accomplished by adding just a few more power-electronic components required for a 3-level topology. A complete 3-phase system is designed and simulated. Its good performance is demonstrated, and its benefits and limitations are pointed out. Furthermore the feasibility of this new topology is also explored and verified by implementing a low-power inverter system with the proposed topology.
Keywords :
invertors; network topology; power factor; power grids; solar cells; 3-phase system; PV panel; low-power inverter system; partial 5/3 level topology; photovoltaic panel; power electronic component; power extraction; power factor; solar grid-tie inverter; voltage variation; Capacitors; Clamps; Insulated gate bipolar transistors; Inverters; Pulse width modulation; Switches; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Energy Conversion Congress and Exposition (ECCE), 2014 IEEE
Conference_Location :
Pittsburgh, PA
Type :
conf
DOI :
10.1109/ECCE.2014.6954188
Filename :
6954188
Link To Document :
بازگشت