DocumentCode :
1515309
Title :
Revisiting the Itoh-Tsujii Inversion Algorithm for FPGA Platforms
Author :
Rebeiro, Chester ; Roy, Sujoy Sinha ; Reddy, D. Sankara ; Mukhopadhyay, Debdeep
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Institue of Technol. Kharagpur, Kharagpur, India
Volume :
19
Issue :
8
fYear :
2011
Firstpage :
1508
Lastpage :
1512
Abstract :
The Itoh-Tsujii multiplicative inverse algorithm (ITA) forms an integral component of several cryptographic implementations such as elliptic curve cryptography. For binary fields generated by irreducible trinomials, this paper proposes a modified ITA algorithm for efficient implementations on field-programmable gate-array (FPGA) platforms. Efficiency is obtained by the fact that the adapted ITA algorithm uses FPGA resources better and requires shorter addition chains. Evidence is furnished and supported with experimental results to show that the proposed architecture outperforms reported results. The proposed method is also shown to be scalable with respect to field sizes.
Keywords :
field programmable gate arrays; public key cryptography; FPGA platforms; Itoh-Tsujii inversion algorithm; Itoh-Tsujii multiplicative inverse algorithm; cryptographic implementation; elliptic curve cryptography; field programmable gate array platform; irreducible trinomial; Algorithm design and analysis; Circuits; Clocks; Elliptic curve cryptography; Equations; Field programmable gate arrays; Hardware; Logic functions; Polynomials; Table lookup; Field-programmable gate-array (FPGA)-based designs; Itoh-Tsujii algorithm (ITA);
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2010.2051343
Filename :
5484454
Link To Document :
بازگشت