DocumentCode
1515561
Title
An accurate model for power DMOSFETs including interelectrode capacitances
Author
Scott, Robert S. ; Franz, Gerhard A. ; Johnson, Jennifer L.
Author_Institution
General Electric Res. & Dev., Schenectady, NY, USA
Volume
6
Issue
2
fYear
1991
fDate
4/1/1991 12:00:00 AM
Firstpage
192
Lastpage
198
Abstract
A SPICE-compatible circuit model for power MOSFETs is presented. It is based on device physics and uses a subcircuit representation. The interelectrode capacitances are modeled accurately as nonlinear functions of the applied biases. Various second-order effects relating to the gate capacitance model are discussed, and strategies are presented to include them in the model. The model parameters can be obtained from device measurements. The model is verified by comparing measured and simulated waveforms from a gate charge test circuit
Keywords
capacitance; digital simulation; electrodes; electronic engineering computing; insulated gate field effect transistors; power transistors; semiconductor device models; SPICE-compatible; applied biases; gate capacitance; interelectrode capacitances; power DMOSFET; semiconductor device modelling; subcircuit representation; Capacitance; Circuit simulation; Circuit synthesis; Circuit testing; Costs; MOS devices; MOSFET circuits; Power system modeling; SPICE; Voltage;
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/63.76805
Filename
76805
Link To Document